1. Field of the Invention
The invention relates generally to methods for fabricating complementary metal oxide semiconductor (CMOS) structures. More particularly, the invention relates to methods for fabricating CMOS structures with enhanced performance.
2. Description of the Related Art
Complementary metal oxide semiconductor (CMOS) structures comprise mated pairs of complementary conductivity type (i.e., typically n and p conductivity type, or dopant polarity) field effect transistors. CMOS structures are desirable insofar as the complementary conductivity types provide for reduced power consumption when operating CMOS devices.
Although CMOS structures are readily fabricated, modem generations of CMOS structures nonetheless suffer within the context of CMOS device optimization. In particular, materials of composition of individual CMOS field effect transistor components may often considerably influence CMOS field effect transistor operating parameters. Materials of composition that are of particular concern include semiconductor substrate composition and crystallographic orientation, and gate electrode layering structure and materials of composition.
Semiconductor substrate compositions and crystallographic orientations influence carrier mobility within CMOS devices. Gate electrode compositions affect depletion effects and work functions within CMOS gates.
CMOS structures continue to be prevalent within current and anticipated generations of semiconductor technology. Thus, a need continues to exist for fabricating CMOS structures with enhanced performance.